MIPI Alliance releases I3C Basic v1.2 utility and control bus interface
MIPI Alliance’s new I3C Basic v1.2
The MIPI Alliance, an international organisation that develops interface specifications for mobile and mobile-influenced industries, has announced the release of MIPI I3C Basic v1.2, a scalable utility and control bus interface for connecting peripherals to a microcontroller or an application processor, streamlining integration and improving cost efficiencies. Version 1.2 reorganises the specification, with separate sections for mandatory and optional features that can be implemented based on application needs.
MIPI I3C Basic is a rich subset of the member-version MIPI I3C that is licensed on royalty-free terms. The I3C interface, introduced in 2016 and updated to v1.1 in 2019, was designed to build upon the key attributes of the legacy serial interfaces I2C, SPI and UART while making it easier to implement. At the same time, it offers greater performance and power efficiency, and adds a host of features that remove many of the pain points faced by developers.
MIPI I3C Basic has also been the centrepiece of several industry collaborations. It has been adopted by PCI-SIG and NVM Express as a system management bus (SMBus), by JEDEC in its sideband bus and DDR5 standard, by ETSI in its Smart Secure Platform (SSP) and Universal Integrated Circuit Card (UICC), and is an area of focus for a MIPI liaison relationship with DMTF (Distributed Management Task Force).
Users may download the I3C Basic specification on the MIPI website.
Key Use Cases of MIPI I3C and I3C Basic
MIPI I3C technology, implemented on a standard CMOS I/O, uses a two-wire interface and supports in-band interrupts, reducing pin count and signal paths to offer system designers less complexity and more flexibility. It provides a typical data rate of 11.1 Megabits per second (Mbps), with options for higher-performance high-data-rate modes up to 100Mbps, a substantial leap in performance and power efficiency compared with legacy interfaces.
Key use cases include:
- Connecting peripherals to processors in mobile and embedded devices
- System debug and trace
- Use as a control sideband bus for:
- DDR5 DRAM memory interface
- SSD control interface
- MIPI Camera Control Interface (CCI)
Expanding MIPI I3C Ecosystem
A growing list of companies and developer communities are recognising the flexibility, resilience and design benefits of MIPI I3C and I3C Basic.
The I3C product ecosystem includes microcontrollers, microprocessing units, wireless IoT SoCs (systems on chips), sensors and specialty integrated circuits. A large set of tools is also available to support development and testing—from protocol analysers to development boards to USB host adapters. Software drivers are available for Linux and the Zephyr real-time OS, and companies have provided reference implementations for their specific products.
MIPI member companies integrating MIPI I3C into their products and services include: Binho LLC, Boréas Technologies, Diodes Incorporated, Microchip Technology, Montage Technology, NXP Semiconductors, Prodigy Technovations, Renesas Electronics Corporation, Robert Bosch GmbH, SmartDV Technologies India Private Limited, STMicroelectronics, Synopsys, TDK InvenSense, Teledyne LeCroy, Texas Instruments Incorporated and others.
“The MIPI I3C ecosystem has grown rapidly over the past few years, and we expect this rapid adoption to persist,” said Hezi Saar, the chair of the MIPI Alliance. “Companies have embraced the I3C interface for its innovative features and substantial improvements in performance and power efficiency compared with legacy interfaces. I3C offers developers exceptional flexibility, making it suitable for a diverse range of products, from smartphones and wearables to data centre systems.”
MIPI I3C Developer Support and Resources
To support developers, MIPI has added specifications to facilitate the integration of MIPI I3C, including a Discovery and Configuration specification (DisCo) for I3C, an I3C Host Controller Interface (MIPI I3C HCI), a Transfer Command Response Interface (MIPI I3C TCRI) and a Debug Over I3C specification, all publicly available. Also, an I3C HCI driver is available in the Linux kernel and an I3C Conformance Test Suite is also available. Further, the newly established I/O Bridges Working Group has begun development of an I/Os over I3C bridge specification, expected to be completed in mid-2026. Updated FAQs and application notes that correspond with I3C/I3C Basic v1.2 will be available soon to download on the I3C webpage. In addition, in late June MIPI held an I3C/I3C Basic Plugfest in Warsaw in conjunction with MIPI Member Meeting #69. Participants from nine companies had the opportunity to engage in interoperability testing between controller and target devices.
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